Investigate the instruction set and architectural features of a modern RISC processor such as the Digital Equipment Corporation Alpha or Motorola/IBM PowerPC. In what ways does it differ from the architecture of the Intel Pentium processor family?The main difference between the architectures of Digital Equipment Corporation's (DEC) Alpha and Intel's Pentium processors are the instruction sets. In this paper I intend on defining both RISC and CISC processors. In doing this I will be comparing DEC's Alpha 21164 (a microprocessor that implements the Alpha architecture) and also Intel's Pentium processors (from the Pentium-R through the Pentium II). Reduced Instruction Set Computing or RISC processing is a CPU architecture with an instruction set that eliminates some (but not all) complex instructions by pairing down and reducing them in complexity so that instructions can be performed in a single processor cycle. This is accomplished through high-level compilers that breakdown the more complex, less frequently used instructions into simpler instructions. Thus, allowing the RISC architecture to im-plement a smaller instruction set that utilizes more registers and eliminating the need for microcode. "The Alpha architecture is a 64-bit load and store RISC architecture designed with particular emphasis on speed, multiple instruction issue, multiple processors, and software migration from many operating systems." (1, pg. 1-1) Most recent CPU designs are superscalar and superpipelined. Superscalar means that the architecture provides two pipelines for executing multiple instructions in parallel. Superpipelining increases the number of pipeline stages, allowing for results from either pipeline to be simultaneously used to avoid stalls thus, improving data flow by removing data dependency. "The 21164 microprocessor is a superscalar pipelined processor manufactured using 0.5-micron CMOS (Complementary Metal Oxide Semi-conductor) technology." (1, ...
